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Article #512Re: Vertical Retrace interrupt?
From: Dave Stampe-Psy+Eng
Date: Sat, 08 Aug 1992 13:55
Date: Sat, 08 Aug 1992 13:55
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1903 bytes
then@lesti.hut.fi (Tomi H Engdahl) writes: >There is a way to keep timer interrupt in phase with VGA hardware. >First you measure the time between VGA retraces. Then set the timer >to one-shot mode and set the pulse time a little more shorter than >interrupt period. Then set the original IRQ0 interrupt to your own interrupt >routine. The you just send start signal to timer, and the system syncs >to VGA vertical retrace in few frames. > >The interrupt routine does following: > >1. Wait for vertical retrace to start >2. Send the start timer period signal to timer >3. (put here your own code) >4. Return from interrupt routine > >I have heard that this system has been implemented with only few per cent >processing time overhed. This is implemented in REND386: you can get source code from sunee.uwaterloo.ca-- look for the devel3.zip file. Look at the source files sgsppt.c, sgint.c, and glovedel.asm. The overheas is one interrupt per frame plus a 500 uS resync delay every fifth frame. -------------------------------------------------------------------------- | My life is Hardware, | | | my destiny is Software, | Dave Stampe | | my CPU is Wetware... | | | Anybody got a SDB I can borrow? | dstamp@watserv1.uwaterloo.ca | __________________________________________________________________________
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Newsgroups: rec.games.programmer Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!torn!watserv2.uwaterloo.ca!watserv1!dstamp From: dstamp@watserv1.uwaterloo.ca (Dave Stampe-Psy+Eng) Subject: Re: Vertical Retrace interrupt? Message-ID: <Bso403.BK2@watserv1.uwaterloo.ca> Organization: University of Waterloo References: <4284@news.duke.edu> <THEN.92Aug7212356@lesti.hut.fi> Date: Sat, 8 Aug 1992 13:55:14 GMT Lines: 35