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Article #2156

Re: Phase detector for huge jitter ??

#2156
From: Falk Brunner
Date: Wed, 21 Apr 2004 21:59
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"5hinka" <anonim99@poczta.wp.pl> schrieb im Newsbeitrag
news:c66n5p$gsl$1@atlantis.news.tpi.pl...
> Estimating clock will be in different time periods.
> I have already Extracted clock from 2MBit HDB3 signal.
> I think that i will estimate clock on PLL changing FPD filter for
different
> time periods.
>
> The hole problem now is to build Phase detector for such big jitter.

Simple. Use a 4 bit counter for incomming clock and local VCO. So the
compare frequency is then 1/16. With the normal Phase detector with a
working range of one period (T), you have a 16 T working range on the
desired frequency.

Regards
Falk
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From: "Falk Brunner" <Falk.Brunner@gmx.de>
Newsgroups: sci.electronics.design,de.sci.electronics,aus.electronics,sci.electronics.misc
Subject: Re: Phase detector for huge jitter ??
Date: Wed, 21 Apr 2004 23:59:32 +0200
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