🚀 go-pugleaf

In article <dfs.703361967@ro> dfs@doe.carleton.ca (David F. Skoll) writes:

	[tying unused TTL inputs high through a resistor to +5]
> ...the Motorola LSTTL databook says it's OK to tie the inputs
>directly to +5v.  Is this typical of all LSTTL input circuitry, or
>peculiar to Motorola's?  Why in most designs I've seen do people use
>either the resistor or spare gate method?  Would power-on transients
>cause problems?

	The original (7400 series) TTL was specified for Vcc to vary
up to 7 volts (non-operating), to allow for power-on transients on
the power supply.  The absolute-maximum input voltage to the gates
was only 5.5V, with the one exception of SOME of the LS gates
(the ones with diode inputs).  That was how TI did it; Fairchild
apparently had ALL their LS gates capable of taking direct
tie to +5V, and were very careful to point out that THEIR chips
would work with direct connection to +5, but that their competitors'
wouldn't.

	The 1k resistor would fix this problem; even when the input
emitter-base junction broke down, the current was kept low (a milliamp
or so wouldn't permanently injure the device).

	With many families of circuitry today (74F, 74C, 74HC, 74HCT,
74AS, 74ALS) all being more-or-less compatible, that 1k resistor
kept on being used (where it wasn't necessary) simply for backward
compatibility.  I think it was only 7400 and part of the 74LS
that EVER had this problem.