🚀 go-pugleaf

In article <8167ih$72u5@gamma.dmz-eu.st.com>, Dave Smith
<dsmith@bristol.nospam.st.com> writes

>Ok, let's look at a scenario.
>
>You have a chip, called the X400.  It's specced to run at 400 MHz, with normal
>cooling.  Under these conditions, the die will be at 100 C.  However, you know 
>that the semiconductor manufacturer has left a 25% safety margin on its timing,
>so you know that a device will run at 500 MHz at 100 C die temperature.  

That's how old chips worked because the processes limited the speed.
Very few people tried to overclock 486's because it basically didn't
work as the timeconstants and switching speeds were the limiting factor.

>So, you
>crank up the clock speed to 500 MHz, and put on a couple of extra fans, which 
>will keep the die temperature down to 100 C.  All you are doing here is eating
>into the manufacturer's safety margin. 

This would be true if you were switching speed limited. It would not be
true if you were thermally limited. Generally when overclocking one is
talking about a chip that, say, is made with a process that delivers (in
your case) 500MHz devices, but the limiting factor is the size of the
gate capacitance. These are invariably made as small as possible and so
are at the limits of mask technology and thus subject to the greatest
manufacturing variability. Unfortunately on a modern multi-million
device processor the gate capacitance largely determines the power
consumption. So in fact the selection is more on power consumption
rather than speed. The last time I saw the raw switching speed of a
processor component mosfet it was well into the picosecond range.
Usually (invariably?) the tracks are to a much lower tolerance and are
very much larger than the gate channel.

>It is true that most overclocked devices will run with a die temperature of 
>about 100 C; this is because people are generally unadventurous with their
>cooling systems.  They are not getting the benefit of cooler, faster devices 
>because they simply do not add enough cooling.
>
>However, you also know that, if you could get the die temperature down to 40 C,
>the resistances in the device will be halved. Now, as the speed of the device
>depends on the time constant, RC, halving the resistance will halve the delay
>within the chip, allowing the chip to run at twice the speed.

Vastly too simplistic. It's rarely true for modern chips that this is
true because the clock speed is not usually limited by simple RC
constants. That's more true of simple circuits you build on a
breadboard. 

>So, you increase the clock speed to 1 GHz, and then strap on enough extra 
>cooling
>(fans, Peltier heat pump, refridgeration system, bathe in liquid 
>nitrogen/helium/
>etc.) to get the temperature of the die down to 40 C (this will probably mean 
>that the case will be somewhere around 0 C or lower), then hey presto! You have 
>a
>1 GHz device.

Laf! 

>Now, to tackle your point "If not and the process permits higher speed then 
>clock 
>it some more".  If you were to increase the clock speed beyond 1 GHz, this would 
>break the device in two ways:
>
>  o You are already at the maximum speed that the chip can run.  Data is 
>expected
>    to arrive ready for the next clock edge within 1 ns.  Increasing the clock 
>    speed will mean an even tighter constraint, and the data simply won't get
>    there in time.

Unfortunately we aren't typically discussing chips whose raw switching
speed is the limiting factor. We are talking about chips that CAN
process at higher speeds but which are thermally limited, which is the
normal situation with modern CPU's.

>  o Increasing the clock speed will cause the device to dissipate even more 
>heat,
>    warming it up.  This will slow down the transistors, and mean that the 
>device
>    isn't even able to meet 1 GHz any more.
>
>Note: these numbers are made up.  They don't reflect reality, they just made the
>maths easier.  They do, however, illustrate the point.

They might have done, about ten years ago.

>
>A few years ago, I did some characterisation experiments on an HCMOS device,

Right. A LSI chip characteristic assumed to be identical to the tiny and
very busy core of a modern CPU. A dangerous assumption I would suggest.

> 
>using
>a thermostream (a bit of kit that is able to squirt a high-speed stream of air 
>on 
>to a device at any temperature you like, between about -25 C and +125 C.  Looks
>a bit like a cubic elephant, and runs on electricity and compressed air).
>Unsurprisingly, when I cooled the device with -25 C air, it was able to run 
>faster
>without errors than when I blasted it with air at  +20 C or +70 C.  If, as you 
>say, the die will always run at 100C, then the speed at which I get data errors 
>should be the same no matter what temperature air I use.  I've probably got the
>results lying around in a log book somewhere.  
>I can only draw two possible conclusions from these results:
>
>  1 CMOS devices run faster when they are colder, like I've been trying to say,
>
>or
>
>  2 A month or so of my life is just a figment of my imagination.

No, unfortunately it's obsolete knowledge, things have moved on.
Mind you your experience is precisely what I would expect were the HCMOS
chip to have been thermally limited. It's also precisely what I would
expect from a LLI chip with 'power' output circuits that WERE RC limited
and running with risetimes appropriate to the clock used.

>Given that questioning one's own sanity is a path I don't wish to go down, I
>conclude that option 1 is correct, unless you would like to explain another 
>reason why I got these results?

Oh, I could add a whole bunch more, however comparing a LSI HCMOS device
designed to work at 100MHz or less with a VHSI processor designed to
work at close to 1000MHz is a risky assumption.

>BTW:This will be my last post on the subject, as it has already got too out of 
>    hand.

Oh, just when I was enjoying myself.

-- 
Oz