🚀 go-pugleaf

In article <DrqGVLArivM4EwLX@provocative.freeserve.co.uk>, Gav <Gavin@NOSPAM.co.uk> writes:
|> You don't appear to have taken anything other than higher clock speed =
|> higher power dissipation into account. There are a few other reasons a
|> device has a clock limit, parasitic capacitance for example...

On the contrary, I have taken other things into account.  It is true that higher
clock speed = higher power dissipation, but higher temperature = higher
resistance.  As I said in the other post, the delay is a function of resistance
and capacitance, so if you reduce the resistance, you reduce the delay.

Otherwise, why is it that our SPICE transistor models run faster when they are 
in colder operating conditions?

If you can get the _die_ of a chip cooler, it will run faster.  This is one of 
the functions of extra cooling in overclocked systems.  A chip with a die at 10C
can run faster than a chip with a die at 40C.  Both temperatures are within 
the safe limits of most chips, so neither is overheating, but the first will have
intrinsically faster transistors because of the lower temperature.

-- 
David Smith, Silicon Design Engineer  Tel: +44 (0)1454 462380 (direct)
STMicroelectronics                    Fax: +44 (0)1454 617910
1000 Aztec West            TINA (ST only): (065) 2380
Almondsbury                          Home: 01454 616963
BRISTOL                            Mobile: 07932 642724
BS32 4SQ                       Work Email: dsmith@bristol.nospam.st.com
                               Home Email: David.Smith@gazpacho.nospam.demon.co.uk