🚀 go-pugleaf

dsmith@contract15.inmos.co.uk (Dave Smith) writes:

> In article <x2emdp17uo.fsf@zdbaora.nat.bt.com>, Robin Smith <smithrc@zdbaora.nat.bt.com> writes:
> |> dsmith@bristol.nospam.st.com (Dave Smith) writes:
> |> 
> |> > Rubbish (sort of).  Device Speed is always a function of temperature, i.e. the
> |> > hotter it is, the slower it runs.  Extra cooling in overclocked machines has two
> |> > functions:
> |> >  o Stop the device from exceeding a safe temperature limit, beyond which the chip
> |> >    can be physically damaged
> |> >  o Keep the device as cool as possible, to maximise the speed at which it can run
> |> >    The colder a device is, the faster it will run.
> |> > 
> |> 
> |> I'm just back from the pub so restraint mode=unrestrained
> |> 
> |> Bollocks, the phrase "Device Speed is always a function of
> |> temperature" is wrong. "temperature is a function of device speed" is
> |> correct. CMOS only uses current ( generates heat ) when it switches,
> |> the faster you switch a CMOS circuit the hotter it gets.
> 
> Correct.  What generates this heat?  Resistance.  The capacitance of a device is 
> not affected by temperature, but the resistance *is*.  Ironically, the hotter
> a device is, the higher the resistance, so the more heat it generates.
> 
> |> The phrase "Keep the device as cool as possible, to maximise the speed
> |> at which it can run. The colder a device is, the faster it will run."
> |> is patently untrue. Keeping the temperature will stop the chance of
> |> breakdown by stopping failures due to thermal problems however it will
> |> not stop electrical limits ( capacitance etc. ). 
> 
> You appear to have forgotten elementary electronic theory.  Simply putting
> parasitic capacitance (capacitance between the node you're interested in, and 
> ground) in a circuit will not slow it down; the speed reduction is caused by the
> combination of capacitance with the resistance of the driving transistor
> (resistance of the wire interconnect is also becoming an increasingly important
> factor as we move towards deep-sub-micron device dimensions).  The resistance of
> the device increases as temperature increases, and the delay is directly
> proportional to that resistance.
> 
> As I said before, any device will be able to run faster if you can keep it below
> it's normal operating temperature (at normal clock speed).
> 
> |>                                                   If we could cool the
> |> systems enough to make them run fast enough we would be using ZX-81s
> |> in liquid nitrogen clocking at 1GHz. Now there is a thought!
> 
> If we're going to do that, then use superconducting materials for interconnect...
> 
> Anyway, this has now gone waaaaaay off-topic.
> 
> -- 
> David Smith                   Tel: +44 (0)1454 462380 (direct)
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Yes I agree with what you say but the point I'm making is that the RC
time constant is the limiting factor. Assuming you keep R constant by
keeping the chip cool the capacitance is still the limiting factor.
So you cannot clock a device faster than the capacitance allows
( unaffected by temperature ).

So I *assume* INTEL/AMD make their chips and rate them as to how fast
they can safely be run at ( with a bit of tolerance for safety ).

But I also *assume* that if there is a strong demand for slow devices
and their fab facility is making lots of high speed devices and few
slow devices, then some will be relabelled as slow.  Although this
might not make economic sense as if there is a scarcity of slow ones
their price should rise to meet the demand - digression to economics.

This is definitely my last posting about CMOS/heat/RC time constants -
ever!

Robin

P.S. Does Godfrey Gaston work with you? I know he disappeared to the
South of England to work with some silicon company.