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Article #10778

Re: IBM AS/400 is the world's slowest computer

#10778
From: Zalman Stern
Date: Tue, 22 Dec 1992 09:23
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In article <16030@auspex-gw.auspex.com> guy@Auspex.COM (Guy Harris) writes:
> >3) The AS400 is a capability based tagged architecture.  It offers  
security
> >    like nothing else on the market.  That's not to say that it's  
perfect,
> >    but while all us RISCy folks have been off worrying about MIPS, IBM  
has
> >    noticed that tools providing incredibly tight control over access to
> >    information are crucial in many markets.  Try writing an AS400 virus!
> 
> Just out of curiosity, how much of the capability stuff is implemented
> in what I, at least, would consider the *real* instruction set - i.e.,
> the so-called "vertical microcode" instruction set - and how much is
> implemented in the "high-level" instruction set?
> 
> I.e., precisely how CISCy is the "vertical microcode" instruction set? I
> don't particularly care how CISCy the "high-level" instruction set is -
> Smalltalk bytecodes are probably somewhat "high-level", as may be the
> internal bytecodes used by various language interpreters, but both can
> be handled, these days, by non-"high level CISC" processors (both RISC
> and CISC).

My understanding is the further down you go in instruction sets on the  
AS/400, the more differences there are between different implementations.  
That is, the "vertical microcode" instruction set is implementation  
dependent. Of course my main complaint with incredibly "high level" machines  
like this is that I've never really been able to understand how they work.  
My disgust level is exceeded about the point someone says "well though,  
that's not the instruction set the hardware implements. We have another  
layer here that..." for the second or third time.

There was an article in one of "the rags" claiming that IBM is going to do a  
64 bit RISC based version of the AS/400. Details on what that means would be  
very interesting. In particular, is it based on PowerPC or is IBM going to  
have two 64 bit RISC architectures floating around. Or is it one of these  
"RISC implementations" rather than a "RISC architecture."
--
Zalman Stern		   zalman@adobe.com		    (415) 962 3824
Adobe Systems, 1585 Charleston Rd., POB 7900, Mountain View, CA 94039-7900
  "Yeah. Ask 'em if they'll upgrade my shifters too." Bill Watterson
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From: zstern@adobe.com (Zalman Stern)
Newsgroups: comp.arch
Subject: Re: IBM AS/400 is the world's slowest computer
Message-ID: <1992Dec22.092355.29859@adobe.com>
Date: 22 Dec 92 09:23:55 GMT
References: <16030@auspex-gw.auspex.com>
Sender: usenet@adobe.com (USENET NEWS)
Organization: Adobe Systems Incorporated
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