Article View: comp.arch
Article #22147Re: Handling mis-alignment (was Re: RISC Machine Data Structure Word Alignment Problems?
From: John Mashey
Date: Sun, 04 Feb 1990 19:20
Date: Sun, 04 Feb 1990 19:20
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In article <1577@mipos3.intel.com> kds@blabla.UUCP (Ken Shoemaker) writes:
>The i486 handles misaligned transfers transparently from the programming
...
>In addition, the i486 has the ability to force traps on all misaligned
>transfers. This lets people insure that the data structures for their
1) That's a very nice feature, like what we once asked IBM to add to S/370s.
I hope it gets plenty of use.
2) Although coming from the other direction, what MIPS does is:
a) If you say nothing, trap misaligned references (killing process).
b) On request, trap misalignment, and either fix them up, or
fix them up, and keep a record of where they occurred, to help the
user figure out what's happening.
c) If you recompile the program and request it, the unaligned
operations get generated.
--
-john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!mips!winchester!mashReferences:
<3428@odin.SGI.COM> <AGLEW.90Jan31211451@dwarfs.csg.uiuc.edu> <2038@bnr-rsc.UUCP> <1577@mipos3.intel.com>Show Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!mips!winchester!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Handling mis-alignment (was Re: RISC Machine Data Structure Word Alignment Problems? Message-ID: <35488@mips.mips.COM> Date: 4 Feb 90 19:20:11 GMT References: <3428@odin.SGI.COM> <AGLEW.90Jan31211451@dwarfs.csg.uiuc.edu> <2038@bnr-rsc.UUCP> <1577@mipos3.intel.com> Sender: news@mips.COM Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Inc. Lines: 20