DSP chip design

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2 total messages Started by Steve Rehfuss Wed, 27 Jan 1993 23:20

#12384

Author: Steve Rehfuss
Date: Wed, 27 Jan 1993 23:20

7 lines
679 bytes

DSP chips are optimized for a certain class of algorithms, relative to
general purpose microprocessors.  What's a good reference on the architectural
tradeoffs being made vis-a-vis the class of algorithms targeted?

Thanks in advance,
Steve Rehfuss
stever@anago.cse.ogi.edu

Re: DSP chip design

#12360

Author: Joe Buck
Date: Thu, 28 Jan 1993 00:27

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In article <49154@ogicse.ogi.edu> stever@anago.cse.ogi.edu (Steve Rehfuss) writes:
>DSP chips are optimized for a certain class of algorithms, relative to
>general purpose microprocessors.  What's a good reference on the architectural
>tradeoffs being made vis-a-vis the class of algorithms targeted?

Edward Lee did a series of two articles for the IEEE's ASSP Magazine;
"Programmable DSP Architectures, Part I" appears in the October 88
issue and part 2 appears in the January 89 issue.  This series has a
lot of information on DSP architectures and why they are the way they
are.

--
Joe Buck	jbuck@ohm.berkeley.edu

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