Article View: comp.lang.verilog
Article #170Re: Verilog <--> VHDL translators
From: Masaharu Goto
Date: Mon, 11 Jan 1993 17:50
Date: Mon, 11 Jan 1993 17:50
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865 bytes
I think you didn't miss too much. The new information I've got are, 1) VDOC-454 benchmark VDOC-454 can reasonably translate behavioral Verilog description to VHDL. There were a coule of minor bugs translating `define and array index. Other than those it seems like VDOC-454 translated very well. 2) About InterHDL, I haven't seen any further information. The message I've got was very brief and didn't explain much of the details.
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Path: arc1-ca.pugleaf.net!sparky!uunet!olivea!spool.mu.edu!sdd.hp.com!hpscit.sc.hp.com!hplextra!hpcc05!hpyhde4!hpysoln!gotom From: gotom@hpysoln.tky.hp.com (Masaharu Goto) Newsgroups: comp.lang.verilog Subject: Re: Verilog <--> VHDL translators Message-ID: <32560004@hpysoln.tky.hp.com> Date: 11 Jan 93 17:50:35 GMT References: <C0D9D0.MpG@world.std.com> Organization: YHP Hachioji IT, Tokyo Japan Lines: 14