🚀 go-pugleaf

SYSTEMS SCIENCE IS LOOKING FOR A TOP-NOTCH VERIFICATION ENGINEER

We are looking for an experienced verification engineer who enjoys doing
verification and working with many different projects. You would learn
about new verification methodologies and particularly about using VERA,
Systems Science's object-oriented, concurrent verification language.
You would help customers get up to speed using VERA to verify their
Verilog-based designs, providing pre and post-sales technical support. 
You would also be involved in the actual verification work with selected
customers.
        
The ideal candidate has verified complex ASICs and systems, has a good
understanding of transactor-based test methodology, and has good verbal 
and written communication skills. Experience with OO and with concurrent 
programing languages is a definite plus. If you have experience with
CUDL or VERA, you are ahead of the game :-)

Systems Science delivers innovative design automation software for
design verification and test of complex ASICs and systems. Our customers 
include companies like Advanced Micro Devices, Cisco, Hewlett Packard, 
Intel, NEC, Sun Microsystems, Toshiba, and many other leading semiconductor
and electronics companies.  We have offices in Palo Alto and Pasadena. 
We have a great team, working in a superb environment, and we offer an 
excellent compensation package (stock options, pension plan, etc). 

Please send your resume to "jobs@systems.com", or for more information
about Systems Science or to check for other openings, please visit us
at http://www.systems.com.