Article View: comp.lang.verilog
Article #96Wanted: Informations on parallel VHDL/Verilog Simulators
From: Finnegan T. Tsai
Date: Thu, 12 Nov 1992 19:58
Date: Thu, 12 Nov 1992 19:58
12 lines
836 bytes
836 bytes
Hi, Experts I am trying to gather any informations related to event-driven parallel VHDL or Verilog simulators. Would you please help me? Any clues to papers or academic researches are highly appreciated. Desperately Finney
Technical Details
Message-ID:
<1992Nov12.200836.8991@hubcap.clemson.edu>Path:
arc1-ca.pugleaf.net!sparky!uunet!ogicse!emory!swrinde!gatech!hubcap!fpstShow Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!ogicse!emory!swrinde!gatech!hubcap!fpst From: tsai@hal.com (Finnegan T. Tsai) Newsgroups: comp.lang.verilog,comp.lang.vhdl,comp.parallel Subject: Wanted: Informations on parallel VHDL/Verilog Simulators Keywords: parallel processing, VHDL, Verilog, Logic Simulator Message-ID: <1992Nov12.200836.8991@hubcap.clemson.edu> Date: 12 Nov 92 19:58:54 GMT Article-I.D.: hubcap.1992Nov12.200836.8991 Sender: fpst@hubcap.clemson.edu (Steve Stevenson) Organization: HaL Computer Systems Lines: 12 Approved: parallel@hubcap.clemson.edu Nntp-Posting-Host: molly.hal.com