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Thread View: comp.lang.verilog
1 messages
1 total messages Started by Rich Edelman Fri, 25 Oct 1996 00:00
SW Engineer: San Jose, C/C++, EDA, Flex/Bison, Verilog/VHDL
#172
Author: Rich Edelman
Date: Fri, 25 Oct 1996 00:00
39 lines
2344 bytes
Subject: SW Engineer: San Jose, C/C++, EDA, Flex/Bison, Verilog/VHDL
 
Design Acceleration, Inc. is looking for a software engineer with
experience in CAD. Especially logic simulation.
 
Location: San Jose, CA
Start Date: Immediate.
Duration: Permanent or 2-3 month contract. Permanent preferred.
            Upon successful project completion, we would like to
            consider full-time employment.
 
Job: You'll work with a team of programmers,
            using your knowledge to build a parsing and expression
            evaluation engine. This expression evaluator will be part 
            of a larger software project. After this project completes,
            you'll help us develop the next generation products.
 
Skills: Strong C/C++ programmer with experience in EDA software.
            Flex and Bison experience is a plus.
            Verilog or VHDL experience is a plus.
 
 
Please see http://www.designacc.com for more information.
 
Email your resume in confidence to 
        rich@designacc.com 
or fax your resume to
        408-371-5196
or call 
        408-559-8500 x129. 
 
I am the hiring manager and would like to talk to qualified individuals.
No headhunters.
 

-- 
Rich Edelman, Design Acceleration, Inc.
rich@designacc.com (408)-559-8500 x129
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