Thread View: comp.lang.verilog
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Started by Viewlogic Systems, Inc.
Thu, 09 Feb 1995 15:38
Job Opening - Corporate Applications Engineer
Author: Viewlogic Systems, Inc.
Date: Thu, 09 Feb 1995 15:38
Date: Thu, 09 Feb 1995 15:38
21 lines
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1802 bytes
Corporate Applications Engineer/Synthesis The Viewlogic Corporate Applications Group is looking to add a team member to focus on synthesis tools. This individual will communicate customer requirements to marketing and engineering and will work with engineering and marketing to improve and position the product line, write HDL style guides, technical notes, publish articles, create HLD demos, assist at major trade shows like DAC and EuroDAC, and support the Viewlogic Sales force worldwide. As such, 10 to 20% worldwide travel will be required. The position will be based in the Bay Area. We are looking for someone who is currently, or was recently, an ASIC designer with a BSEE/BSCS (MSEE/MSCS preferred) with excellent communication skills. Two or more years experience designing ASICs and FPGAs with high-level design tools in a Verilog or VHDL environment is required. DSP, timing analysis, and test experience a plus. Send resumes (ASCII, PostScript, or Microsoft Word only) to garo@viewlogic.com.
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