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COURSE: High Level Design Using Verilog, Oct 9-13, Beaverton OR
From: training
Date: Fri, 15 Sep 1995 00:00
Article: 192
Message-ID: <DEyp1r.LFx@qualis.com>
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- Subject: COURSE: High Level Design Using Verilog, Oct 9-13, Beaverton OR
- From: training
- Date: Fri, 15 Sep 1995 00:00
- Article: 192