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COURSE: High Level Design Using Verilog, Nov 6-10, Beaverton OR
From: training
Date: Fri, 06 Oct 1995 00:00
Article: 193
Message-ID: <DG0549.Jp9@qualis.com>
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- Subject: COURSE: High Level Design Using Verilog, Nov 6-10, Beaverton OR
- From: training
- Date: Fri, 06 Oct 1995 00:00
- Article: 193