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Article #1042Re: metastability in ASIC synchronizer implementations
From: Mark Freeman
Date: Tue, 29 Mar 1988 16:59
Date: Tue, 29 Mar 1988 16:59
31 lines
1470 bytes
1470 bytes
A recent overview article on metastability is: Metastable Behavior in Digital Systems Linday Kleeman and Antonio Cantoni IEEE Design & Test of Computers V4 N6 (December 1987) In article <420@ole.UUCP>, upton@ole.UUCP (Mike Upton) writes: > Some other tricks can be played using parrelel synchronizers and > a voting scheme, with different delay elements inserted before > each synchronizer. This method does not suffer from the > latency of a multiple cascaded flip-flop implementation. In this article, the authors claim that voting schemes do not improve metastable behaviour over that of a single synchronizer. They reference another article of theirs, concerning this: Can Redundancy and Masking Improve the Performance of Synchronizers? ibid IEEE Transactions on Computers July 1986, pp. 643-646 I have not seen this article. -- Mark S. Freeman Applied Microsystems Corp. markf@amc
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arc1-ca.pugleaf.net!utzoo!mnetor!uunet!husc6!bloom-beacon!mit-eddie!uw-beaver!tikal!amc!markfReferences:
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Path: arc1-ca.pugleaf.net!utzoo!mnetor!uunet!husc6!bloom-beacon!mit-eddie!uw-beaver!tikal!amc!markf
From: markf@amc.UUCP (Mark Freeman)
Newsgroups: comp.lsi,sci.electronics
Subject: Re: metastability in ASIC synchronizer implementations
Message-ID: <627@amc.UUCP>
Date: 29 Mar 88 16:59:20 GMT
References: <26@xenon.UUCP> <420@ole.UUCP>
Organization: Applied Microsystems Corp.; Redmond, WA
Lines: 31
Keywords: synchronizer, flipflop, metastable, gate-array, standard cell
Summary: Recent metastability reference &
voting