Article View: comp.lsi
Article #487Re: vhdl puzzle
From: Todd Carpenter
Date: Wed, 06 Feb 1991 17:14
Date: Wed, 06 Feb 1991 17:14
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----------------------------------------------------------------------------- **Whirrr** Net police! Hey, folks! There is a VHDL newsgroup! It is ideal for those nagging VHDL questions! comp.lang.vhdl is the place to be! ----------------------------------------------------------------------------- Ross> architecure adder of adder is > [explanation of problem deleted, because someone already beat me to it as I > was composing my response...] You could get around this by declaring d and e variables within the scope of the process, or by putting d and e in the process activation list, or by having another process, or by making d,e,f assignments all concurrent, or by...
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uwm.edu!src.honeywell.com!farragut!carpent From: carpent@SRC.Honeywell.COM (Todd Carpenter) Newsgroups: comp.lsi Subject: Re: vhdl puzzle Message-ID: <1991Feb6.171431.6995@src.honeywell.com> Date: 6 Feb 91 17:14:31 GMT References: <1991Feb6.155659.23123@uicbert.eecs.uic.edu> Sender: news@src.honeywell.com (News interface) Distribution: comp Organization: Honeywell Systems & Research Center Lines: 17 In-Reply-To: smith1@uicbert.eecs.uic.edu's message of Wed, 6 Feb 91 15:56:59 GMT Followupsto: comp.lang.vhdl Nntp-Posting-Host: farragut.src.honeywell.com