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Article #934

Does full-speed 256 L2 cache reduce SMP efficiency?

#934
From: Steve Snyder
Date: Tue, 15 Feb 2000 00:00
11 lines
1139 bytes
I have read that a full-speed 256KB L2 cache reduces SMP efficiency 
relative to a half-speed 512KB cache.  For example, a P3/600e vs. a 
P3/600.

Is this true?  Is there greater benefit in SMP to a larger L2 cache, 
even if it is half as fast?

Thank you.


***** Steve Snyder *****
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From: "Steve Snyder" <swsnyder@home.com>
Subject: Does full-speed 256 L2 cache reduce SMP efficiency?
Date: 2000/02/15
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