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Article #2379

Interfacing a PIC to SRAM - OE / W question

#2379
From: Al Borowski
Date: Tue, 23 Jul 2002 23:44
46 lines
2430 bytes
Hi,

Just 2 quick questions. I'm hooking a 32kb X 8 chunk of SRAM up to a
pic. PIC I/O pins are running short, so is it OK to connect pin X
directly to the output enable Pin on the SRAM, and connect a NOT gate
from output enable to write enable? If so, I can us pin X as a read /
write pin on the SRAM.

The timing would then look like this:

to read a byte...

Put proper address on address lines
Set output enable true, write enable false 
set chip enable true
read byte
set everything false

To write a byte...

Put proper address on address lines
Set output enable false, write enable true 
put byte to be written on data bus
set chip enable true
set everything false

Does this sound OK? 

Secondly, because the SRAM is arranged 32kb X 8, I need a method to
allow bydirectional data transfer between the PIC and the RAM. The
catch? I only have 4 PIC pins free. I suppose I could use shift
registers to do this. What's the easiest way to convert series to
parallel and parallel to series? Speed isn't an issue, but power
consumption (<20ma or better)is so anything with a shutdown input
would be great. No wildly exotic parts please - I'd prefer it if any
sugggested parts could be bought in small quantities from dick smith /
radio shack / tandy.

I know that it would be much easier to use a 32kb X 1 chip, but these
are alot harder to get.

btw, I have a 5V supply.
Thanks alot - any ideas or constructive criticsm is appreciated.

Al Borowski
www.alpage.cjb.net
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From: a.borowski@student.qut.edu.au (Al Borowski)
Newsgroups: sci.electronics.design,aus.electronics
Subject: Interfacing a PIC to SRAM - OE / W question
Date: 23 Jul 2002 16:44:49 -0700
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