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In <18341.2a92f106@levels.unisa.edu.au> 8809787l@levels.unisa.edu.au writes:

>Dear reader

>In many papers in the field of fault diagnosis and Test generation for digital
>circuits I have seen benchmark circuits used to make comparison between the
>speed and effeciency of various test generation methods.

>I have commonly seen labels such as C880, C5315 or C7552 used to describe or
>mension these benchmark circuits. In many papers on this topic also I have seen
>the following reference to this circuits mensioned:

>(*) F. Brglez and H. Fujiwara, "A neutral netlist of ten combinational
>benchmark circuits and a target translator in FORTRAN," in Proc. IEEE Int.
>Symp. on Circuits and Systems, Kyoto, Japan, June 5-7, 1985

>One place that I found this reference mensioned was in :

>(*) Short Papers "Expremental Evaluation of Testability Measure for Test
>Generation" by Chandra & Patel in IEEE trans. on Computer Aided Design Vol. 8,
>No. 1 January 1989.

>I need to know the following:

>(1) What are these benchmark circuits ?

These are gate netlists of existing or synthesized circuits issued exactly 
for the purpose to get comparable results for some developed simulation or
testing software. If you want to know what their function is, 
I can't help you much.

>(2) Where can I get these from ?

The original source of the ISCAS'85 benchmarks is the FTP server from
mcnc.org. In Europe there is a copy at ftp.uni-duisburg.de (134.91.4.132)
in /pub/cad/ISCAS85.tar.Z (this site is "here"). 

>(3) What is the Brglez & Fujiwara reference ( I could not locate it ) ?

This seems to be one of big mysteries in research on testing. The references
give some page numbers that are outside the range of pages of the
ISCAS proceedings. Seems to be an unofficial addendum, or researchers like
referring much more than reading ;-) Anyway, the ISCAS85.tar.Z file 
contains a TeX file which gives some information.

>(4) How can I use the above benchmark netlist to test a test generation method?

The package contains net lists as well as fault lists, so the base information
is given. Unfortunately, there is no list, which of the faults are redundant.

>(5) Is there a updated version of this which has come out since 1989 ?

There is a "nonredundant" set of the same combinational circuits which is
dated 1991. It is in the above package.
The so-called ISCAS'89 benchmarks (names starting with "s" instead of "c")
are sequential benchmark circuits for the same purpose.

>I would be very greatfull if some one could help me by responding to the
>following e-mail address:

>		8809787L@LV.LEVELS.UNISA.EDU.AU

>Thank you very much, and hope to hear from you soon.

>Yours faithfully
>Peyam Pourbeik


>School of Electronic Engineering
>University of South Australia ( Levels campus )
>Adelaide, South Australia, Australia

Hope that helps

Holger

-- 
|  |   / Holger Veit             | INTERNET: veit@du9ds3.uni-duisburg.de
|__|  /  University of Duisburg  | BITNET: veit%du9ds3.uni-duisburg.de@UNIDO
|  | /   Dept. of Electr. Eng.   | "No, my programs are not BUGGY, these are
|  |/    Inst. f. Dataprocessing |          just unexpected FEATURES"

In article <18341.2a92f106@levels.unisa.edu.au> 8809787l@levels.unisa.edu.au writes:

>In many papers in the field of fault diagnosis and Test generation for digital
>circuits I have seen benchmark circuits used to make comparison between the
>speed and effeciency of various test generation methods.

>I have commonly seen labels such as C880, C5315 or C7552 used to describe or
>mension these benchmark circuits. In many papers on this topic also I have seen
>the following reference to this circuits mensioned:

>(*) F. Brglez and H. Fujiwara, "A neutral netlist of ten combinational
>benchmark circuits and a target translator in FORTRAN," in Proc. IEEE Int.
>Symp. on Circuits and Systems, Kyoto, Japan, June 5-7, 1985

>[ ... ]

>I need to know the following:

>(1) What are these benchmark circuits ?

They are combinational circuits. I think they are parts of, or
complete, real designs. The number of Inputs and Outputs, and the
complexity of the circuits varies.

Usually referred to as ISCAS-85 circuits.

There is a similar set of sequential circuits presented on ISCAS-89, I
think.

>(2) Where can I get these from ?

I think MCNC - Microelectronics Center North Carolina - in the US is
the correct address. I do not have any e-mail or other.

It is an ASCII netlist, based on TEGAS TDL. Easy to transform to
whatever format you need.

They are free available, so if you know somebody with a copy, you may
get a compy from them.

(I may send you what we have, 8 of the 10 (?) circuits.)

>(3) What is the Brglez & Fujiwara reference ( I could not locate it ) ?

It is a tape, distributed to interested participants on the symposium.
(And others later.)

>(4) How can I use the above benchmark netlist to test a test generation method?

 A - Get a copy of the netlist
 B - Transform the netlist to the netlist_of_your_choise
 C - Run your ATPG
 D - Compare your results with other results. These you may find in
     conference proceedings or journals.

>(5) Is there a updated version of this which has come out since 1989 ?

They vere issued in 1985, 1989 was the year of the sequential
circuits, if my memory serves me right.

What is there to update on a netlist? These are supposed to be
standard circuits which anybody may use to get comparable results from
ATPGs or fault simulators. I hope nobody has changed them.

Bj{\o}rn
--
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