Using burst mode on PCI bus

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5 total messages Started by user Thu, 11 Apr 1996 02:50

#28

Author: user
Date: Thu, 11 Apr 1996 02:50

14 lines
899 bytes

We are in the process developing our first PCI bus add-on card.
Here are some questions regarding the software interface :

1. Is burst mode data transfer implemented on most motherboards, for
    example Triton chipset, etc ?

2. If this is implemented, how does the software interface address it?
    As far as I know, no x486 instruction can set up a burst mode
    transfer.  Is there perhaps a special Pentium instruction that can
    accomplish this ?

Any info will be appreciated.

Johan Theron

Re: Using burst mode on PCI bus

#29

Author: Michael Richmann
Date: Wed, 10 Apr 1996 20:17

23 lines
1281 bytes

scitron@mail.global.co.za (user) wrote:
>We are in the process developing our first PCI bus add-on card.
>Here are some questions regarding the software interface :
>
>1. Is burst mode data transfer implemented on most motherboards, for
>    example Triton chipset, etc ?

It is on the Intel Endeavor board (Triton chipset) w/burst cache 
installed.

>
>2. If this is implemented, how does the software interface address it?
>    As far as I know, no x486 instruction can set up a burst mode
>    transfer.  Is there perhaps a special Pentium instruction that can
>    accomplish this ?

Don't rightly know.  Turning the burst mode on/off on the Endeavor is
accomplished through the bios settings.

-- 
Mike

My opinions, not Argonne's...

Re: Using burst mode on PCI bus

#30

Author: Kazimir Kylheku
Date: Wed, 10 Apr 1996 21:02

25 lines
1546 bytes

In article <4kh37m$fmd@dodo.global.co.za>,
user <scitron@mail.global.co.za> wrote:
>We are in the process developing our first PCI bus add-on card.
>Here are some questions regarding the software interface :
>
>1. Is burst mode data transfer implemented on most motherboards, for
>    example Triton chipset, etc ?
>
>2. If this is implemented, how does the software interface address it?
>    As far as I know, no x486 instruction can set up a burst mode
>    transfer.  Is there perhaps a special Pentium instruction that can
>    accomplish this ?

Umm, the Pentium processor transfers data between its internal cache and a
64-bit external bus. It's not done on an instruction by instruction basis. The
burst access is an interface feature that lets you push around these cache
lines faster.

These transfers are transparent to the programmer. There is nothing you have to
do in the machine code to effectuate a pipelined burst data transfer.

Are you sure you are qualified to design PCI interface cards?

What on earth does this have to do with comp.lang.c? 
--

Re: Using burst mode on PCI bus

#31

Author: Manu
Date: Fri, 12 Apr 1996 00:47

24 lines
1359 bytes

Michael Richmann <richmann@cmt.anl.gov> wrote:

>scitron@mail.global.co.za (user) wrote:
>>We are in the process developing our first PCI bus add-on card.
>>Here are some questions regarding the software interface :
>>
>>1. Is burst mode data transfer implemented on most motherboards, for
>>    example Triton chipset, etc ?

>It is on the Intel Endeavor board (Triton chipset) w/burst cache 
>installed.

>>
>>2. If this is implemented, how does the software interface address it?
>>    As far as I know, no x486 instruction can set up a burst mode
>>    transfer.  Is there perhaps a special Pentium instruction that can
>>    accomplish this ?

>Don't rightly know.  Turning the burst mode on/off on the Endeavor is
>accomplished through the bios settings.

	Also  on the 2 pentiums board I have (60 and 100). 
	I may be wrong but isn't it a 'hardware' selection for the pci burst
mode ?

Re: Using burst mode on PCI bus

#32

Author: Michael Richmann
Date: Fri, 12 Apr 1996 18:31

35 lines
1759 bytes

manu@mail.imaginet.fr (Manu) wrote:
>Michael Richmann <richmann@cmt.anl.gov> wrote:
>
>>scitron@mail.global.co.za (user) wrote:
>>>We are in the process developing our first PCI bus add-on card.
>>>Here are some questions regarding the software interface :
>>>
>>>1. Is burst mode data transfer implemented on most motherboards, for
>>>    example Triton chipset, etc ?
>
>>It is on the Intel Endeavor board (Triton chipset) w/burst cache 
>>installed.
>
>>>
>>>2. If this is implemented, how does the software interface address it?
>>>    As far as I know, no x486 instruction can set up a burst mode
>>>    transfer.  Is there perhaps a special Pentium instruction that can
>>>    accomplish this ?
>
>>Don't rightly know.  Turning the burst mode on/off on the Endeavor is
>>accomplished through the bios settings.
>
>	Also  on the 2 pentiums board I have (60 and 100). 
>	I may be wrong but isn't it a 'hardware' selection for the pci burst
>mode ?
>

Well, "hardware" settings can be accomplished through either bios or
jumper settings, depending on the manufacturer's preference for doing
things.

-- 
Mike

My opinions, not Argonne's...

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