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Re: Verilog <--> VHDL translators

From: John Cooley

Date: Tue, 05 Jan 1993 05:46

Article: 169

Message-ID: <C0D9D0.MpG@world.std.com>

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Thread Root
  • Subject: Re: Verilog <--> VHDL translators
  • From: John Cooley
  • Date: Tue, 05 Jan 1993 05:46
  • Article: 169