🚀 go-pugleaf

DAS 9200 question
By: Kenneth C. Adkins on Wed, 14 Oct 1992 21:37

Re: test
By: David C. Black on Wed, 14 Oct 1992 13:41

Re: test
By: Michele Favalli on Tue, 13 Oct 1992 17:39

Re: test
By: Ken Butler on Tue, 13 Oct 1992 15:11

Magic question: Using ext2spice for GaAs circuits
By: AUSTIN,BLANCA on Mon, 12 Oct 1992 20:04

Feedback diagnostics
By: oblivion on Thu, 08 Oct 1992 17:34

Deadline Extended for VLSI Test Symposium
By: Kumar Venkat on Wed, 07 Oct 1992 22:41

Re: test
By: Tracy Larrabee on Wed, 07 Oct 1992 16:30

test
By: S.J.Lia on Wed, 07 Oct 1992 12:08

Re: Boundary Scan JTAG 1149.1 Experience?
By: Nai-Chi Lee on Thu, 12 Nov 1992 13:58

Re: Boundary Scan JTAG 1149.1 Experience?
By: Arnie Frisch on Wed, 11 Nov 1992 16:56

Re: Boundary Scan JTAG 1149.1 Experience?
By: Nai-Chi Lee on Tue, 10 Nov 1992 21:55

Re: Boundary Scan JTAG 1149.1 Experience?
By: Stephen Vinoski on Tue, 10 Nov 1992 22:45

Re: Boundary Scan JTAG 1149.1 Experience?
By: Alvin Jee on Tue, 10 Nov 1992 22:24

Re: Boundary Scan JTAG 1149.1 Experience?
By: Arnie Frisch on Tue, 10 Nov 1992 16:40

Re: JTAG 1149.1 && LSSD
By: Edward Joseph Kearns on Tue, 10 Nov 1992 01:30

Re: Boundary Scan JTAG 1149.1 Experience?
By: Stephen Vinoski on Tue, 10 Nov 1992 00:19

Re: Tons of 1149.1 experience...
By: Edward Joseph Kearns on Tue, 10 Nov 1992 00:59

Re: Boundary Scan JTAG 1149.1 Experience?
By: Arnie Frisch on Mon, 09 Nov 1992 17:29

BSDL descriptions
By: PJ Dickinson on Mon, 09 Nov 1992 11:37

Re: Boundary Scan JTAG 1149.1 Experience?
By: Stephen Vinoski on Sat, 07 Nov 1992 22:05

Current-mode Subthreshold Analog VLSI
By: Karamchedu on Sat, 07 Nov 1992 23:10

Bin test!
By: Liu Hung-Bin on Mon, 05 Oct 1992 11:25

Monthly Posting of the comp.lsi.testing charter
By: Yoo Ho Cho on Fri, 02 Oct 1992 21:34

Help with PhD Topic
By: 8809787l on Thu, 01 Oct 1992 00:52

Digital Testers
By: Yoo Ho Cho on Wed, 30 Sep 1992 14:16

VXI, IEEE488 and controlling software
By: Yoo Ho Cho on Tue, 29 Sep 1992 19:31

Re: Ring oscillators for characterization?
By: Mark Johnson on Thu, 03 Sep 1992 16:05

Ring oscillators for characterization?
By: David C. Black on Thu, 03 Sep 1992 11:28

Monthly Posting : comp.lsi.testing charter
By: Yoo Ho Cho on Wed, 02 Sep 1992 20:54

Re: Rise and shine
By: Kevin Karplus on Tue, 01 Sep 1992 22:44

Re: to test or not to test
By: Kumar Venkat on Tue, 01 Sep 1992 20:29

Re: to test or not to test
By: Joel Darnauer on Tue, 01 Sep 1992 02:41

Re: To Test or Not to Test?
By: Praveen Vishakantaiah on Mon, 31 Aug 1992 22:34

Re: Rise and shine
By: Praveen Vishakantaiah on Mon, 31 Aug 1992 14:51

Re: Rise and shine
By: Holger Veit on Mon, 31 Aug 1992 07:35

Re: Testing vs. verification (was: Change this group name?)
By: Holger Veit on Mon, 31 Aug 1992 06:59

Re: Rise and shine
By: Raghu Hudli on Fri, 28 Aug 1992 16:28

VICTORY and CATE
By: Stephen Vinoski on Fri, 28 Aug 1992 20:17

To Test or Not to Test?
By: Janak H. Patel on Fri, 28 Aug 1992 18:57

Re: Change Group Name? (and ICCAD-92 publicity)
By: W. Kent Fuchs on Fri, 28 Aug 1992 18:51

Testing Thoughts
By: Hank Walker on Fri, 28 Aug 1992 16:19

Rise and shine
By: Praveen Vishakantaiah on Fri, 28 Aug 1992 14:36

Conversion of test vectors generated by Silos to TekWaves.
By: Manolis Stratakis on Fri, 28 Aug 1992 14:36

Re: Change this Group Name?
By: JUSTIN HARLOW on Fri, 28 Aug 1992 09:42

Re: Change this Group Name?
By: Russ Schnapp on Thu, 27 Aug 1992 21:55

How to read Group comp.ai.vision
By: Yang NI on Thu, 27 Aug 1992 11:52

Design vs. Test (was Re: Change this Group Name?)
By: Don Allingham on Thu, 27 Aug 1992 06:12

Re: Change this Group Name?
By: Holger Veit on Wed, 26 Aug 1992 14:02

Help on Magic / gds data format
By: Georg Thallinger (IIS) on Wed, 26 Aug 1992 12:52

Re: Change this Group Name?
By: DOUGLAS ALAN THOMAE on Tue, 25 Aug 1992 18:28

Re: Change this Group Name?
By: Yoo Ho Cho on Tue, 25 Aug 1992 18:37

Verilog to TEGAS translator
By: Hai Vo-Ba on Fri, 21 Aug 1992 14:18

Re: Benchmark Circuits for Digital circuit test pattern generation
By: Bjorn B. Larsen on Fri, 21 Aug 1992 12:10

Re: Benchmark Circuits for Digital circuit test pattern generation
By: Holger Veit on Fri, 21 Aug 1992 09:35

Benchmark Circuits for Digital circuit test pattern generation
By: 8809787l on Wed, 19 Aug 1992 15:40

Automated Testing of X Applications
By: Vonn Marsch on Wed, 19 Aug 1992 18:04

scan test references needed
By: Stephen Vinoski on Tue, 18 Aug 1992 14:55

CFP GI/ITG-Workshop (German)
By: Thomas Kropf on Fri, 14 Aug 1992 07:14

Sequential ATPG w/ source needed
By: David Suggs on Mon, 14 Sep 1992 18:34

Re: To Test or Not to Test?
By: Subhash Chandra Roy on Wed, 09 Sep 1992 13:32

Re: To Test or Not to Test?
By: Don Allingham on Thu, 03 Sep 1992 07:19

Looking for Dr. D. A. Anderson
By: S Pagey on Thu, 30 Jul 1992 18:26

Wanted: Oppinions for Fault Simulation Tools
By: Vagelis Halkiadakis on Thu, 30 Jul 1992 15:49

Wanted: Documentation on Algotronix CAL
By: Holger Schuppan on Thu, 30 Jul 1992 09:54

Symp. on Integrated Systems - 3/14-16/93 - CFP
By: Gaetano Borriello on Tue, 28 Jul 1992 22:31

1149.1 for Xilinx FPGA's
By: Michael Haney on Fri, 24 Jul 1992 19:39

Re: DTMF Decoder Project
By: John Cooley on Thu, 23 Jul 1992 15:19

Re: ½m²ß
By: Al S. Ghandchi on Tue, 21 Jul 1992 14:26

Re: JTAG 1149.1 && LSSD
By: Mourad B. Takla on Wed, 04 Nov 1992 21:05

JTAG 1149.1 && LSSD
By: John Hawkins P730 on Tue, 03 Nov 1992 20:46

Boundary Scan JTAG 1149.1 Experience?
By: Edward Joseph Kearns on Mon, 02 Nov 1992 18:40

Monthly Posting - comp.lsi.testing charter
By: Yoo Ho Cho on Mon, 02 Nov 1992 10:27

Need ISCAS89 --> EDIF converter
By: blade on Sun, 01 Nov 1992 22:23

This is a test. Sorry.
By: Bob Jackiewicz on Fri, 30 Oct 1992 22:11

another test
By: Edward Joseph Kearns on Fri, 30 Oct 1992 22:28

PLATYPUS
By: kalapi roy 9200001 on Fri, 30 Oct 1992 20:40

2nd announcement for FTCS-23
By: kaaniche on Tue, 27 Oct 1992 14:03